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Advanced Circuit Design Methodology

High-Bandwidth Interface for AI Computing

Efficient Hardware Design Framework

Chip Gallery

Referenceless Baud-Rate CDR

ASSCC'24

PAM-3 TX w/ Crosstalk Cancellation

TCAS-II'24

112Gb/s 8channel TX


112Gb/s 8channel RX


ISI-Resistant CDR

TCAS-II'24

Baud-Rate RX w/ 2UI Integration

ESSERC'24

Low-Jitter PAM-4 Baud-Rate CDR

TCAS-I'24

PAM-4 RX w/ APS CDR

TCAS-I'24

48-Gb/s PAM-4 Receiver

JSSC'23

PAM-4 Receiver w/ SS-MMSE PD

Access'23

Stochastic CTLE Adaptation

TCAS-II'23

Baud-Rate CDR with Stochastic PD

ASSCC'21, JSSC'22

PAM-4 TX w/ sub-sampling PLL

VLSI'22

CDR with Stochastic FPD

ISSCC'20, JSSC'22

200Gb/s PAM4 Transmitter

ISSCC'21, JSSC'22

THP-Based PAM4 Transmitter

Access'21

Injection-Locked Clock Multiplier

JSSC'21

Video Interface Receiver

TCAS-II'21

Crosstalk Cancellation for HBM

ISSCC'20

Injection-Locked PLL

TCAS-II'19

Multi-Standard Transmitter

TCAS-II'19

ILO-Based CDR

JSSC'19

Referenceless Digital CDR

VLSI'19, JSSC'21

Video Interface Receiver

VLSI'19, JSSC'20

Video Interface Receiver

TCAS-II'18

64Gb/s VCSEL Transmitter

VLSI'19

Pluggable Optics

TCAS-II'18

Video Interface Receiver

TCAS-II'17

Referenceless CDR

CICC'17, JSSC'18

Voltage-Mode Transmitter

ASSCC'15, JSSC'16, TIE'18

PLL-Based FCRX

ISCAS'15

DLL-Based FCRX

ESSCIRC'14, TCAS-I'16